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1 files changed, 103 insertions, 0 deletions

diff --git a/comp1521/smips/instr.h b/comp1521/smips/instr.h
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--- /dev/null
+++ b/comp1521/smips/instr.h
@@ -0,0 +1,103 @@
+#ifndef INSTR_H_
+#define INSTR_H_
+
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+
+#include "input.h"
+
+// We have to use bit masks to identify the instruction we are to perform.
+// Instructions are stored in a uint32_t, and inputted from hex.
+// The format of the bit masks vary between
+//
+// PPPPPP SSSSS TTTTT DDDDD IIIIIIIIIII
+//   6      5     5     5       11
+//
+// PPPPPP SSSSS TTTTT  IIIIIIIIIIIIIIII
+//   6      5     5         16
+//
+// P = pattern_mask
+// S = five bit register number
+// T = five bit register number
+// D = five bit register number
+// I = immediate mask (size can very between instructions)
+
+// Definitions for 32 bit instruction bits.
+#define PATTERN_BITS 0xFC000000    // 11111100000000000000000000000000
+#define IMMEDIATE_BITS 0xFFFF      // 00000000000000001111111111111111
+#define SHORT_IMMEDIATE_BITS 0x7FF // 00000000000000000000011111111111
+#define S_BITS 0x3e00000           // 00000011111000000000000000000000
+#define T_BITS 0x1f0000            // 00000000000111110000000000000000
+#define D_BITS 0xf800              // 00000000000000001111100000000000
+
+// Contains bit masks for instructions for the immediate field.
+enum immediate_mask {
+    im_add = 0x20u,   // 100000
+    im_sub = 0x22u,   // 100010
+    im_and = 0x24u,   // 100100
+    im_or = 0x25u,    // 100101
+    im_slt = 0x2au,   // 101010
+    im_mul = 0x2u,    // 000010
+    im_syscall = 0xcu // 001100
+};
+
+// Contains bit masks for the pattern field.
+enum pattern_mask {
+    pm_add = 0x0u,  // 000000
+    pm_sub = 0x0u,  // 000000
+    pm_and = 0x0u,  // 000000
+    pm_or = 0x0u,   // 000000
+    pm_slt = 0x0u,  // 000000
+    pm_mul = 0x1cu, // 011100
+    pm_beq = 0x4u,  // 000100
+    pm_bne = 0x5u,  // 000101
+    pm_addi = 0x8u, // 001000
+    pm_slti = 0xau, // 001010
+    pm_andi = 0xcu, // 001100
+    pm_ori = 0xdu,  // 001101
+    pm_lui = 0xfu,  // 001111
+};
+
+// Contains an enum representing instructions.
+enum instructions {
+    add,
+    sub,
+    and,
+    or,
+    slt,
+    mul,
+    beq,
+    bne,
+    addi,
+    slti,
+    andi,
+    ori,
+    lui,
+    syscall
+};
+
+// Functions which extract bitfields from an instruction.
+uint32_t get_i(const uint32_t instr);
+uint32_t get_p(const uint32_t instr);
+uint32_t get_d(const uint32_t instr);
+uint32_t get_t(const uint32_t instr);
+uint32_t get_s(const uint32_t instr);
+
+// Functions which emulate mips instructions.
+void mips_add(const uint32_t instr, uint32_t registers[32]);
+void mips_sub(const uint32_t instr, uint32_t registers[32]);
+void mips_and(const uint32_t instr, uint32_t registers[32]);
+void mips_or(const uint32_t instr, uint32_t registers[32]);
+void mips_slt(const uint32_t instr, uint32_t registers[32]);
+void mips_mul(const uint32_t instr, uint32_t registers[32]);
+void mips_beq(FILE *const fptr, const uint32_t instr, uint32_t registers[32]);
+void mips_bne(FILE *const fptr, const uint32_t instr, uint32_t registers[32]);
+void mips_addi(const uint32_t instr, uint32_t registers[32]);
+void mips_slti(const uint32_t instr, uint32_t registers[32]);
+void mips_andi(const uint32_t instr, uint32_t registers[32]);
+void mips_ori(const uint32_t instr, uint32_t registers[32]);
+void mips_lui(const uint32_t instr, uint32_t registers[32]);
+int mips_syscall(uint32_t registers[32]);
+
+#endif